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as1363 1a low dropout linear voltage regulator www.ams.com/ldo revision 1.9 1 - 19 1 general description the as1363 is a low-dropout linear regulator that operates from a +2.0v to +5.5v supply and delivers a guaranteed 500ma load current with low 150mv dropout. the device is available in two versions (see table 1) . one version has a high-accuracy output with a preset voltage (1.2v, 1.5v, 1.8v, 3.0v, 3.3v, or 4.5v). this voltage is internally trimmed and also offers a bypass pin. with a capacitor connected to this bypass pin, the psrr and the noise performance is improved. at the other version the output voltage is user-adjustable (1.2v to 5.3v) and offers an set pin for setting the output voltage. table 1. standard products a low supply current (65a typ.) at maximum load is making the device ideal for portable battery-operated equipment. other features are included such as an active-low open-drain reset output that indicates when the output is out of regulation, a low- current (30na typ.) shutdown mode, an integrated short-circuit and a thermal shutdown protection. when in shutdown, a 5k ? (typ) discharge path is connected between the output pin and ground. the as1363 is available in a 6- pin sot23 package. 2 key features ?? guaranteed output current: 500ma ?? low dropout: 150mv @ 500ma ?? 2.0v to 5.5v input voltage ?? fixed output voltage: 1.2v to 5.0v ?? user-adjustable output voltage: 1.2v to 5.3v ?? power ok output ?? low quiescent current: 40a ?? low shutdown current: 30na ?? thermal overload protection ?? output current limit ?? output discharge path during shutdown ?? 6-pin sot23 package 3 applications the device is ideal for laptops, pdas, portable audio devices, mobile phones, cordless phones, and any other battery-operated portable device. model output type byp set as1363-ad adjustable no yes as1363-_ _ fixed yes no as1363-ad c out 2 .2f 1 in 6 out 3 en 2 pok 5 set c in 1f v in 2.0v to 5.5v v out 1.2v to 5.3v 4 gnd on off r 1 r 2 r pok 100k ? v out logic sup- ply voltage to controller figure 1. as1363 - typical application circuit
www.ams.com/ldo revision 1.9 2 - 19 as1363 datasheet - pin assignments 4 pin assignments figure 2. pin assignments (top view) 4.1 pin descriptions table 2. pin descriptions pin number pin name description 1in +2.0v to +5.5v supply voltage. bypass this pin with a 1f capacitor to gnd (see package drawings and markings on page 16) . 2pok open-drain pok output . pok remains low while v out is below the pok threshold. connect a 100k ? pull-up resistor from this pin to out to obtain an output voltage (see figure on page 1) . 3en active-high enable input . a logic low reduces supply current below 30na. in shutdown mode, the pok output is low, and out is high impedance. connect this pin to in for normal operation. 4 gnd ground 5 set voltage-setting input . connect to gnd for preset output or connect to a resistive voltage- divider between out and gnd to set the output voltage between 1.2v and 5.3v (see figure on page 1) . byp bypass pin. connect a 10nf capacitor from this pin to v out to improve psrr and noise performance (see figure 16 on page 9) . 6out output . sources up to 500ma. bypass this pin with a 2.2f low-esr capacitor to gnd (see figure on page 1) . note: for output voltages below 2v a 4.7f capacitor should be used. 3 en 2 pok 1 in 4gnd 5 set/byp 6out as1363
www.ams.com/ldo revision 1.9 3 - 19 as1363 datasheet - absolute maximum ratings 5 absolute maximum ratings stresses beyond those listed in table 3 may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in electrical characteristics on page 4 is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. table 3. absolute maximum ratings parameter min max units comments in, pok, en, set/byp to gnd -0.3 +6 v out to gnd -0.3 v in +0.3 v output short-circuit duration 1 min continuous power dissipation 800 mw t amb = +70oc; derate 10mw/oc above +70oc operating temperature range -40 +85 oc storage temperature range -65 +150 oc junction temperature +125 oc package body temperature +260 oc the reflow peak soldering temperature (body temperature) specified is in accordance with ipc/jedec j-std-020 ?moisture/reflow sensitivity classification for non- hermetic solid state surface mount devices?. the lead finish for pb-free leaded packages is matte tin (100% sn). moisture sensitive level 1 represents an unlimited floor life time
www.ams.com/ldo revision 1.9 4 - 19 as1363 datasheet - electrical characteristics 6 electrical characteristics all limits are guaranteed. the parameters with min and max values are guaranteed with production tests or sqc (statistical qual ity control) methods. v in = v out(nom) + 500mv or v in = +2.0v (whichever is greater), c in = 1f, c out = 2.2f, en = in, t amb = -40 to +85 oc (unless otherwise specified). typical values are at t amb = +25 oc . table 4. electrical characteristics symbol parameter condition min typ max unit v in input voltage 2.0 5.5 v v por power on reset falling, 100mv hysteresis 1.78 1.87 1.96 v output voltage accuracy (preset mode) i out = 100a, t amb = +25oc, -0.75 +0.75 % i out = 100ma -1.5 +1.5 i out = 1 to 500ma, v in > (v out + 0.5v) 1 -2 +2 v out adjustable output voltage range 1.2 5.3 v v set/byp set/byp voltage threshold (adjustable mode) v in = 2.5v, i out = 1ma, v out set to 2.0v 1.17 1.20 1.23 v i out guaranteed output current (rms) 500 ma i limit short-circuit current limit v out = 0v 0.55 0.8 1.2 a in-regulation current limit v out > 96% of nominal value 0.8 a set/byp threshold 50 100 150 mv i set set/byp input bias current v set/byp = 1.2v -100 +100 na i q quiescent current i out = 100a 40 150 a i out = 500ma 65 200 v in - v out dropout voltage 2 i out = 500ma v out = 2.5v 150 320 mv ? v lnr line regulation v in from (v out + 100mv) to 5.5v, i load = 5ma -0.125 +0.125 %/v ? v ldr load regulation i out = 1 to 500ma -0.001 +0.001 %/ma psrr ripple rejection f = 1khz, i out = 10ma, adjustable output 65 db f = 10khz, i out = 10ma, adjustable output 70 f = 100khz, i out = 10ma, adjustable output 60 output voltage noise 10hz to 100khz, i out = 10ma, adjustable output 80 v rms 100hz to 100khz, i out = 10ma, adjustable output 65 shutdown i off shutdown supply current en = gnd, v in = 5.5v, t amb = 25c 0.03 0.5 a en = gnd, v in = 5.5v 15 v ih en input threshold 2.0v < v in < 5.5v 1.6 v v il 2.0v < v in < 5.5v 0.6 v i en en input bias current en = in or gnd, t amb = +25oc 1 na t amb = +85oc 5
www.ams.com/ldo revision 1.9 5 - 19 as1363 datasheet - electrical characteristics pok output v ol pok output low voltage pok sinking 1ma 0.05 0.25 v operating voltage range for valid pok signal pok sinking 100a 1.1 5.5 v pok output high leakage current pok = 5.5v, t amb = +25oc 1 na t amb = +85oc 5 pok threshold rising edge (referenced to v out(nom) )909498% thermal protection t shdnn thermal shutdown temperature 170 oc ? t shdnn thermal shutdown hysteresis 20 oc c out output capacitor load capacitor range 1 2.2 f load capacitor esr 500 m ? 1. guaranteed by production test of load regulation and line regulation. 2. dropout voltage is defined as v in - v out , when v out is 100mv below the value of v out measured for v in = (v out(nom) + 500mv). since the minimum input voltage is 2.0v, this specification is only valid when v out(nom) > 2.0v. table 4. electrical characteristics (continued) symbol parameter condition min typ max unit
www.ams.com/ldo revision 1.9 6 - 19 as1363 datasheet - typical operating characteristics 7 typical operating characteristics v in = v out(nom) + 0.5v, c in = 1f, c out = 2.2f, t amb = 25c (unless otherwise specified). figure 3. v drop vs. i out ; figure 4. v out vs. i out ; v out(nom) = 2.5v 0 20 40 60 80 100 120 140 160 0 100 200 300 400 500 load current (ma) dropout voltage (mv) 2.499 2.5 2.501 2.502 2.503 0 100 200 300 400 500 output current (ma) output voltage (v) figure 5. v out vs. temperature; v out(nom) = 2.5v figure 6. v out vs. v in ; v out(nom) = 2.5v 2.496 2.497 2.498 2.499 2.5 2.501 2.502 2.503 2.504 2.505 -45 -30 -15 0 15 30 45 60 75 90 temperature (c) output voltage (v) 0 0.5 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5 3 input voltage (v) output voltage (v) i out = 0ma i out = 500ma figure 7. quiescent current vs. v in ; no load figure 8. quiescent current vs. i out ; v in = 3.0v; 0 20 40 60 80 100 120 0123456 input voltage (v) quiescent current (a) 0 20 40 60 80 100 0 100 200 300 400 500 output current (ma) quiescent current (a)
www.ams.com/ldo revision 1.9 7 - 19 as1363 datasheet - typical operating characteristics figure 9. quiescent current vs. temperature; v in = 3.0v figure 10. psrr vs. frequency; i out = 10ma, c in = 68nf, 0 20 40 60 80 100 -45 -30 -15 0 15 30 45 60 75 90 temperature (c) quiescent current (a) no l oad i out = 100ma -90 -80 -70 -60 -50 10 100 1000 10000 100000 frequency (hz) psrr (db) figure 11. line transient response; v in = 3.0v to 3.5v, i out = 100ma figure 12. load transient response; v in = 3.0v, i out = 50ma to 250ma 20mv/div 200mv/div v in v out 1ms/div 100ma/div 50mv/div v out i out 5s/div figure 13. startup; v in = 3.0v, i out = 100ma figure 14. startup; v in = 3.0v, i out = 100ma 1v/div 1v/div e n v out 1ms/div 1v/div 1v/div e n v out 20s/div
www.ams.com/ldo revision 1.9 8 - 19 as1363 datasheet - detailed description 8 detailed description the as1363 is a low-dropout, low-quiescent-current linear regulato r specifically designed for battery-powered devices. the regu lator supplies loads of up to 500ma and can deliver a factory-preset output voltage or user-adjustable output voltage. figure 15. block diagram figure 15 shows the block diagram of the as1363. it identifies the basics of a series linear regulator employing a p-channel mosfet as t he control element. a stable voltage reference (1.2vref in figure 15 ) is compared with an attenuated sample of the output voltage. any difference between the two voltages (reference and sample) creates an output from the error amplifier that drives the series control eleme nt to reduce the difference to a minimum. the error amplifier incorporates additional buffering to drive the relatively large gate capacitance o f the series pass p- channel mosfet, when additional drive current is required under transient conditions.. input supply variations are absorbed by the series element, and output voltage variations with loading are absorbed by the low output impedance of the regulator. the device features a 1.2v reference, error amplifier, p-channel pass transistor, and internal feedback voltage-divider (see figure 15) . additional blocks include an output current limiter, thermal sensor, and shutdown logic. 8.1 shutdown if pin en is connected to gnd the as1363 is disabled. in shutdown mode all internal circuits are turned off, reducing supply cu rrent to 30na typical. for normal operation pin en must be connected to in. during shutdown, pok is low. 2 as1363-ad + ? shutdown logic + ? 93% vref + ? 100mv + ? r 1 c out 2.2f 5k ? r 2 + ? r pok 100k ? mosfet driver w/i lim thermal sensor 1 in 6 out 3 en pok 5 set 4 gnd c in 1f v in 2.0v to 5.5v v out logic supply voltage to controller error amplifier on off 1.2v reference v out 1.2v to 5.3v
www.ams.com/ldo revision 1.9 9 - 19 as1363 datasheet - detailed description 8.2 output voltage selection the as1363 is available in two versions (see ordering information on page 18) . one version can only operate at one fixed output voltage and the other version can operate with a preset output voltage or with user-adjustable output voltages (1.2v to 5.3v). ?? for the fixed output voltage version connect a capacitor c byp from pin byp to v out to improve psrr and noise performance (see figure 16) . ?? to use the factory preset output voltage of the user-adjustable output voltage version, connect pin set to gnd (see figure 17) . ?? for configurations using an output voltage other than the factory preset, a voltage-divider from out to set to gnd is required, as shown in (see figure on page 1) . a value for r 2 in the 25k ? to 100k ? range should be sufficient. calculate the value for r 1 as: (eq 1) where: v out is in a range from 1.2v to 5.3v. v set/byp = 1.2v. figure 16. fixed output voltage figure 17. adjustable output using preset output voltage r 1 r 2 v out v setbyp --------------------- 1 ? ?? ?? ? = as1363 c out 2.2f 1 in 6 out 3 en 5 byp 2 pok r pok 100k ? c in 1f v in 2.0v to 5.5v v out 1.2v to 5.0v to controller 4 gnd on off c byp 10nf as1363-ad c out 2.2f 1 in 6 out 3 en 5 set 2 pok r pok 100k ? c in 1f v in 2.5v to 5.5v v out 2.5v to controller 4 gnd on off
www.ams.com/ldo revision 1.9 10 - 19 as1363 datasheet - detailed description 8.3 power-ok the as1363 features a power-ok indicator that asserts when the output voltage falls out of regulation. the open-drain pok outpu t goes low when output voltage at out falls 6% below its nominal value. a 100k ? pull-up resistor from pok to a (typically out) provides a logic control signal. pok can be used as a power-on-reset (por) signal to a microcontrol ler or can drive an external led to indicate a power failure condition. note: pok is low during shutdown. 8.4 current limit the as1363 features current limiting circuitry that monitors the pass transistor, limiting short-circuit output current to 0.8a (typ). the circuitry of the as1363 allows that the output can be shorted to ground for an indefinite period of time without damaging the device. 8.5 thermal overload protection integrated thermal overload protection limits the total power dissipation in the as1363. when the junction temperature (t j ) exceeds +170oc typically, the pass transistor is turned off. normal operation is continued when t j drops approximately 20oc. note: regardless of the hysteresis, continuous short-circuit condition will result in a pulsed output.
www.ams.com/ldo revision 1.9 11 - 19 as1363 datasheet - application information 9 application information 9.1 dropout voltage dropout is the input to output voltage difference, below which the linear regulator ceases to regulate. at this point, the outp ut voltage change follows the input voltage change. dropout voltage may be measured at different currents and, in particular at the regulator max imum one. from this is obtained the mosfet maximum series resistance over temperature etc. more generally: (eq 2) dropout is probably the most important specification when the regulator is used in a battery application. the dropout performan ce of the regulator defines the useful ?end of life? of the battery before replacement or re-charge is required. figure 18. graphical representation of dropout voltage figure 18 shows the variation of v out as v in is varied for a certain load current. the practical value of dropout is the differential voltage (v out - v in ) measured at the point where the ldo output voltage has fallen by 100mv below the nominal, fully regulated output value. the n ominal regulated output voltage of the ldo is that obtained when there is 500mv (or greater) input-output voltage differential. 9.2 efficiency low quiescent current and low input-output voltage differential are important in battery applications amongst others, as the re gulator efficiency is directly related to quiescent current and dropout voltage. efficiency is given by: efficiency = % (eq 3) where: i q = quiescent current of ldo measured at vbias. v dropout i load r series ? = dropout voltage 100mv v in v out v out v in v out v in =v out(typ) +0.5v v in v load i load ? v in i q i load + ?? -------------------------------------- - 100 ?
www.ams.com/ldo revision 1.9 12 - 19 as1363 datasheet - application information 9.3 power dissipation maximum power dissipation (pd) of the ldo is the sum of the power dissipated by the internal series mosfet and the quiescent cu rrent required to bias the internal voltage reference and the internal error amplifier, and is calculated as: watts (eq 4) internal power dissipation as a result of the bias current for the internal voltage reference and the error amplifier is calcul ated as: watts (eq 5) total ldo power dissipation is calculated as: watts (eq 6) 9.4 junction temperature under all operating conditions, the maximum junction temperature should not be allowed to exceed 125oc (unless the data sheet s pecifically allows). limiting the maximum junction temperature requires knowledge of the heat path from junction to case ( ? jc oc/w fixed by the ic manufacturer), and adjustment of the case to ambient heat path ( ? ca oc/w) by manipulation of the pcb copper area adjacent to the ic position. figure 19. package physical arrangements figure 20. steady state heat flow equivalent circuit pd max ?? seriespass ?? i load max ?? = v in max ?? v out min ?? ? ?? pd max ?? bias ?? v in max ?? i q = pd max ?? total ?? pd max ?? seriespass ?? pd max ?? + bias ?? = bond wire chip pcb package lead frame sotxx package junction t j c package t c c pcb/heatsink t s c ambient t a c chip power r ? jc r ? cs r ? sa
www.ams.com/ldo revision 1.9 13 - 19 as1363 datasheet - application information total thermal path resistance: (eq 7) junction temperature (t j oc) is determined by: oc (eq 8) 9.5 explanation of st eady state specifications 9.5.1 line regulation line regulation is defined as the change in output voltage when the input (or line) voltage is changed by a known quantity. it is a measure of the regulator?s ability to maintain a constant output voltage when the input voltage changes. line regulation is a measure of the d c open loop gain of the error amplifier. more generally: line regulation = and is a pure number in practise, line regulation is referred to the regulator output voltage in terms of % / v out . this is particularly useful when the same regulator is available with numerous output voltage trim options. line regulation = % / v (eq 9) 9.5.2 load regulation load regulation is defined as the change of the output voltage when the load current is changed by a known quantity. it is a me asure of the regulator?s ability to maintain a constant output voltage when the load changes. load regulation is a measure of the dc closed loop output resistance of the regulator. more generally: load regulation = and is units of ohms ( ? )(eq 10) in practise, load regulation is referred to the regulator output voltage in terms of % / ma. this is particularly useful when t he same regulator is available with numerous output voltage trim options. load regulation = % / ma (eq 11) 9.5.3 setting accuracy accuracy of the final output voltage is determined by the accuracy of the ratio of r1 and r2, the reference accuracy and the in put offset voltage of the error amplifier. when the regulator is supplied pre-trimmed, the output voltage accuracy is fully defined in the output voltage specification. when the regulator has a set terminal, the output voltage may be adjusted externally. in this ca se, the tolerance of the extern al resistor network must be incorporated into the final accuracy calculation. generally: (eq 12) the reference tolerance is given both at 25oc and over the full operating temperature range. 9.5.4 total accuracy away from dropout, total steady state accuracy is the sum of setting accuracy, load regulation and line regulation. generally: total % accuracy = setting % accuracy + load regulation % + line regulation % (eq 13) r ? ja r ? jc r ? cs r ? sa ++ = t j pd max ?? r ? ja ? ?? t amb + = ? v out ? v in ---------------- ? v out ? v in ---------------- 100 v out ------------ ? ? v out ? i out ---------------- ? v out ? i out ---------------- 100 ? v out ---------------- ? v out v set ? v set ? ?? =1 r 1 ? r 1 ? r 2 ? r 2 ? --------------------- + ?? ??
www.ams.com/ldo revision 1.9 14 - 19 as1363 datasheet - application information 9.6 explanation of dynamic specifications 9.6.1 power supply rejection ratio (psrr) known also as ripple rejection, this specification measures the ability of the regulator to reject noise and ripple beyond dc. psrr is a summation of the individual rejections of the error amplifier, reference and ac leakage through the series pass transistor. the specification, in the form of a typical attenuation plot with respect to frequency, shows up the gain bandwidth compromises forced upon the desig ner in low quiescent current conditions. generally: pssr = db using lower case to indicate ac values (eq 14) power supply rejection ratio is fixed by the internal design of the regulator. additional rejection must be provided externally . 9.6.2 output capacitor esr the series regulator is a negative feedback amplifier, and as such is conditionally stable. the esr of the output capacitor is usually used to cancel one of the open loop poles of the error amplifier in order to produce a single pole response. excessive esr values may a ctually cause instability by excessive changes to the closed loop unity gain frequency crossover point. the range of esr values for stability is usually shown either by a plot of stable esr versus load current, or a limit statement in the datasheet. some ceramic capacitors exhibit large capacitance and esr variations with temperature. z5u and y5v capacitors may be required t o ensure stability at temperatures below t amb = -10oc. with x7r or x5r capacitors, a 2.2f capacitor should be sufficient at all operating temperatures. larger output capacitor values (10f max) help to reduce no ise and improve load transient-response, stability and power-supply rejection. 9.6.3 input capacitor an input capacitor at v in is required for stability. it is recommended that a 1.0f capacitor be connected between the as1363 power supply input pin v in and ground (capacitance value may be increased without limit subject to esr limits). this capacitor must be located at a dista nce of not more than 1cm from the v in pin and returned to a clean analog ground. any good quality ceramic, tantalum, or film capacitor may be used at the input. 9.6.4 noise the regulator output is a dc voltage with noise superimposed on the output. the noise comes from three sources; the reference, the error amplifier input stage, and the output voltage setting resistors. noise is a random fluctuation and if not minimized in some app lications, will produce system problems. 9.6.5 transient response the series regulator is a negative feedback system, and therefore any change at the output will take a finite time to be correc ted by the error loop. this ?propagation time? is related to the bandwidth of the error loop. the initial response to an output transient comes from the output capacitance, and during this time, esr is the dominant mechanism causing voltage transients at the output. more generally: units are volts, amps, ohms. (eq 15) thus an initial +50ma change of output current will produce a -12mv transient when the esr=240m ? . remember to keep the esr within stability recommendations when reducing esr by adding multiple parallel output capacitors. after the initial esr transient, there follows a voltage droop during the time that the ldo feedback loop takes to respond to t he output change. this drift is approx. linear in time and sums with the esr contribution to make a total transient variation at the output of: units are volts, seconds, farads, ohms. (eq 16) where: c load is output capacitor t = propagation delay of the ldo this shows why it is convenient to increase the output capacitor value for a better support for fast load changes. of course th e formula holds for t < ?propagation time?, so that a faster ldo needs a smaller cap at the load to achieve a similar transient response. for insta nce 50ma load current step produces 50mv output drop if the ldo response is 1usec and the load cap is 1f. there is also a steady state error caused by the finite output impedance of the regulator. this is derived from the load regula tion specification discussed above. 20 log ? v out ? v in --------------- - ? ? v transient ? i output r esr ? = ? v transient ? i output = r esr t c load --------------- - + ?? ?? ?
www.ams.com/ldo revision 1.9 15 - 19 as1363 datasheet - application information 9.6.6 turn on time this specification defines the time taken for the ldo to awake from shutdown. the time is measured from the release of the enab le pin to the time that the output voltage is within 5% of the final value. it assumes that the voltage at v in is stable and within the regulator min and max limits. shutdown reduces the quiescent current to very low, mostly leakage values (<1a). 9.6.7 thermal protection to prevent operation under extreme fault conditions, such as a permanent short circuit at the output, thermal protection is bui lt into the device. die temperature is measured, and when a 170oc (as1363) threshold is reached, the device enters shutdown. when the die cools suf ficiently, the device will restart (assuming input voltage exists and the device is enabled). hysteresis of 20oc prevents low frequency oscill ation between start- up and shutdown around the temperature threshold.
www.ams.com/ldo revision 1.9 16 - 19 as1363 datasheet - package drawings and markings 10 package drawin gs and markings the device is available in an 6-pin sot23 package. figure 21. 6-pin sot23 package
www.ams.com/ldo revision 1.9 17 - 19 as1363 datasheet - package drawings and markings figure 22. package markings table 5. package code zzzz xxxx marking encoded datecode zzzz xxxx pin1 pin1 top marking bottom marking
www.ams.com/ldo revision 1.9 18 - 19 as1363 datasheet - ordering information 11 ordering information the device is available as the standard products shown in table 6 . *future product. non-standard devices are available between 1.4v and 4.6v in 50mv steps and between 4.6v and 5.0v in 100mv steps. for more infor mation and inquiries contact http://www.ams.com/contact note: all products are rohs compliant. buy our products or get free samples online at icdirect: http://www.ams.com/icdirect technical support is available at http://www.ams.com/technical-support for further information and requests, please contact us mailto:sales@ams.com or find your local distributor at http://www.ams.com/distributor table 6. ordering information ordering code marking output set/byp delivery form package as1363-bstt-ad asq9 adjustable (preset to 2.5v) set tape and reel 6-pin sot23 as1363-bstt-12* asry 1.2v byp tape and reel 6-pin sot23 as1363-bstt-15 asra 1.5v byp tape and reel 6-pin sot23 AS1363-BSTT-18 asrb 1.8v byp tape and reel 6-pin sot23 as1363-bstt-30 asrc 3.0v byp tape and reel 6-pin sot23 as1363-bstt-33 asrd 3.3v byp tape and reel 6-pin sot23 as1363-bstt-45 asre 4.5v byp tape and reel 6-pin sot23
www.ams.com/ldo revision 1.9 19 - 19 as1363 datasheet - ordering information copyrights copyright ? 1997-2012, ams ag, tobelbaderstrasse 30, 8141 unterpremstaetten, austria-europe. trademarks registered ?. all right s reserved. the material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written con sent of the copyright owner. all products and companies mentioned are trademarks or registered trademarks of their respective companies. disclaimer devices sold by ams ag are covered by the warranty and patent indemnification provisions appearing in its term of sale. ams ag makes no warranty, express, statutory, implied, or by description rega rding the information set forth herein or regarding the freedom of the described devices from patent infringement. ams ag reserves the right to change specifications and prices at any time and without notice. therefore, prior to designing this product into a system, it is necessary to check with ams ag for current information. this product is intended for use in normal commercial applications. applications requiring extended temperature range, unusual environmental requirements, or high reliabi lity applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without addi tional processing by ams ag for each application. for shipments of less than 100 parts the manufacturing flow might show deviations from the stan dard production flow, such as test flow or test location. the information furnished here by ams ag is believed to be correct and accurate. however, ams ag shall not be liable to recipien t or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruptio n of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, perfo rmance or use of the technical data herein. no obligation or liability to recipient or any third party shall arise or flow out of ams ag rendering of technical or other services. contact information headquarters ams ag tobelbaderstrasse 30 a-8141 unterpremstaetten, austria tel: +43 (0) 3136 500 0 fax: +43 (0) 3136 525 01 for sales offices, distributors and representatives, please visit: http://www.ams.com/contact

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